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Automated FMEDA

Automate ISO 26262 FMEDA and minimize fault simulation

A central concept in ISO 26262 is that of safety goals. Random hardware failures may lead to violation of safety goals and hazards that could result in loss of human lives. Automotive ASICs/FPGAs/SoCs include safety mechanisms that prevent or control random hardware failures. Engineers must list potential failure modes and provide evidence that the safety architecture achieves the target automotive safety integrity level (ASIL) of the chip or safety element out of context (SEooC). Failure modes, effects, and diagnostic analysis (FMEDA) is a powerful method to assess the safety architecture and implementation..

The FMEDA process has three crucial steps:

  1. Validation of the SoC safety architecture and partitioning of hardware functions and faults according to relevant failure modes.
  2. Determination of the diagnostic coverage, which is a measure of the ability of safety mechanisms to prevent safety goal violations.
  3. Computation of the hardware safety metrics (SPFM, LFM, PMHF) according to ISO 26262.

OneSpin FMEDA Automation Safety Apps

OneSpin automates the FMEDA steps through a series of safety apps integrated in a comprehensive, interoperable flow that leverages structural analysis, formal proofs, and expert knowledge. The apps can be applied at chip level, and support both RTL and gate-level design models. Crucially, the OneSpin FMEDA flow does not require a test bench, reduce or eliminates slow and effort-intensive fault simulation, and quickly detects shortcomings in the safety architecture.

Fault Contribution Analysis (FCA)

App The FCA App performs an automatic, safety-aware partitioning of complex SoCs. Faults are allocated to hardware parts and sub-parts taking into account safety mechanisms. This reduces engineering effort, enables quick estimates of diagnostic coverage, and validates the safety architecture, while also minimizing the need for fault simulation. 

Fault Propagation and Detection Analysis (FPA/FDA) Apps

The FPA and FDA Apps perform a rigorous, accurate faults analysis. Without the need for a test bench or fault simulation, these apps can identify safe faults (Safe Fault Fraction), and measure diagnostic coverage. Moreover, they may also identify unprotected logic. 

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Hardware Metric Computation (HMC) App

The HMC App integrates with other OneSpin apps to enable both early estimation and accurate computation of hardware safety metrics (SPFM, LFM, PMHF). Multiple users can work in parallel without the complexity of handling multiple spreadsheets. Moreover, ISO 26262 work products can be generated by non-experts using a repeatable and robust flow.

NEW to ISO 26262?

  • OneSpin provides FMEDA flow deployment and knowedge-transfer services

OneSpin ISO 26262 FMEDA Flow

  • Predictable path to ISO 26262 compliance 
  • Minimize fault simulation 
  • Replace manual analyssis steps
  • Repeatable and robust

Tech Talk: ISO 26262 Statistics

Jorg Gosse, functional safety product manager at OneSpin Solutions, talks with Semiconductor Engineering about the statistics behind the standards, what is considered good enough, and how those numbers vary across different standards.

Tech Talk: ISO 26262 Statistics

Jorg Gosse, functional safety product manager at OneSpin Solutions, talks with Semiconductor Engineering about the statistics behind the standards, what is considered good enough, and how those numbers vary across different standards.

Superior TCL1/TCL2/TCL3 Tool Qualification for up to ASIL D SoCs and SEooCs

Support for tool safety compliance is an integral part of state-of-the-art safety-critical verification solutions. OneSpin Solutions meets or exceeds the requirements of functional safety standards. The internationally-recognized testing body TÜV SÜD successfully completed a series of factory inspections and audits of OneSpin’s organization and tool development processes. This conformance level enables OneSpin to provide certified formal verification solutions meeting tool qualification requirements set by ISO 26262. As a result, OneSpin's formal tools and solutions can be applied by customers up to the highest automotive safety integrity levels (ASIL D). Learn more here.

More information…

OneSpin’s Fault Propagation Analysis App automatically identifies non-propagatable faults, allowing their safe elimination prior to simulation, thereby cutting on simulation and debug time while increasing the nominal fault coverage.

»Learn more about the Fault Propagation Analysis App…

OneSpin’s Fault Injection App automates the definition and injection of fault scenarios, eliminating the need of a separate testbench, thereby cutting on engineering effort while enabling a unified and standard-compliant formal verification flow.

»Learn more about the Fault Injection App…

Fault-tolerant electronic components in safety-critical systems are now commonplace in many industry sectors, including automotive, aerospace, power generation, defense, and medical.

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OneSpin 360 EC-FPGA is an automatic sequential equivalence checker that prevents field programmable gate array (FPGA) design flows from introducing synthesis, place-and-route and other implementation errors.

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With this DER-reviewed Tool Qualification Kit (TQK), users can deploy EC-FPGA seamlessly in their DO-254 projects to achieve a new level of productivity and standard compliance, including for Design Assurance Level (DAL) A/B applications.

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OneSpin’s Fault Injection App (FIA) automates the definition and handling of fault injection scenarios, removing the need for ad hoc verification flows or environments, thereby cutting on engineering effort and promoting reusability across projects and teams.

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OneSpin’s Fault Propagation Analysis (FPA) App automatically identifies non-propagatable faults, allowing their safe elimination prior to pre and post simulation, thereby cutting on simulation and debug time while increasing the nominal fault coverage.

»Download the data sheet…

Functional safety standards demand that this risk be assessed and adequately minimized through tool qualification and other processes. For engineering teams, this is a time-consuming task and, worryingly, one for which there are no mature solutions yet. Tool vendors may provide safety certificates or packages, in an attempt to support their customers with safety compliance. Strategies vary and so do the benefits to the user and project.
In this paper, we review requirements on tool classification and qualification, present different safety compliance strategies, and explain their benefits to safety-critical hardware projects.

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Functional safety standards require a rigorous development process to minimize the risk of introducing systematic faults. Some RTL issues may only reveal themselves as bugs in the synthesis netlist. Additionally, synthesis tools manipulate the design to map it into the fixed FPGA structure. These complex transformations present a high risk of introducing bugs. Gate-level simulation and lab testing can only cover a tiny portion of the FPGA functionality and are likely to miss implementation bugs. Moreover, they are slow to run and challenging to debug.
This white paper presents an implementation signoff flow proving that the final FPGA netlist is functionally equivalent to the RTL model. Based on FPGA-specific, mature formal verification technology, the solution is exhaustive and efficient, catching many issues before synthesis starts.

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Automotive technology has come a long way since the days of the Ford Model T. Today's smart vehicles not only assist their drivers with tasks such as parking, lane management, and braking, but also function as a home away from home, with WiFi hotspots and sophisticated entertainment systems. These sophisticated features are made possible by increasingly complex electronic systems—systems that present countless new opportunities for things to go wrong. A defective headrest video screen may be an irritation to a young passenger in the back seat, but a malfunctioning corrective steering system could cost the occupants of the vehicle their lives. Adequate verification is essential.
OneSpin's formal verification solutions can help automotive suppliers continue to advance their technology while keeping drivers and passengers safe. Our safety-critical white paper examines the ISO 26262 automotive standard and makes a case for its indispensability.

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Fault-tolerant hardware development is no longer a niche and presents new challenges. Many engineers face the daunting task of having to examine countless faulty variants of their design in order to integrate and verify multiple safety mechanisms within complex Systems-on-Chip (SoCs).
This white paper examines key goals and challenges in fault-tolerant hardware verification, and presents formal solutions that ensure predictable hardware behavior under all relevant operating conditions and fault scenarios, while saving in engineering and computational resources.

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This presentation focuses on the formal verification solutions that can provide high ROI in AEH development projects. These solutions reduce the risk of undetected hardware issues, and enable a more predictable and efficient path to airworthiness certification.

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We check the web for relevant safety-critical news content and link directly to the source from here. Want to get your monthly recap of relevant news?

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"Our verification approach is based on the verification methodology of [1,2], which is marketed under the name GapFreeVerification™ by OneSpin Solutions1 . This approach uses so called operational properties to construct complete formal specifications and includes methods to verify specification completeness."
"For portability and accessibility, we store tabular specifications in a standard spreadsheet format. The automatic translators of the tabular representation are implemented using Java Emitter Templates (JET) [5]. The operational properties 7 of core functionality are expressed in SystemVerilog assertions using Timing Diagram Assertion Library (TIDAL™) [13]. The properties of auxiliary clusters are written in plain SystemVerilog assertions. Design verification and completeness checks are performed with OneSpin 360 Design Verifier."

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“The MicroSemi ProASIC3 FPGA is a core component of the Advanced Logic System (ALS), and use of the OneSpin 360 Equivalence Checker is an integral part of our FPGA development process for nuclear safety systems.” says Erik Matusek, Safety System Platform Manager at Westinghouse Electric Company, LLC

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Learn more about safety critical design verification with OneSpin

portrait of Jörg Grosse

Jörg Grosse, Product Manager Functional Safety

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